The present invention relates to a multiprocessor system in which a plurality of processors are connected by a shared bus and a distributing process is executed and to a control method of such a multiprocessor system. More particularly, the invention relates to a multiprocessor system in which a master authority and slave authorities in a distributing process of a multiprocessor are dynamically allocated in an initializing process at the time of a system activation and to a control method of such a multiprocessor system.
In a computer system at present, a computer which provides a performance value of 100 to 150 MIPS (100 to 150 million instructions per second) per one processor is installed even in a workstation, a server, and a personal computer. As reasons why such a performance value is realized, there can be mentioned reasons such that a performance similar to that of a large general computer can be effected with low costs by a microprocessor technique. While making efforts to raise a performance per one processor in future, a technique to raise the performance of the whole system by forming a multiprocessor system is also applied to a small size model of a desktop and a disk side model.
In a multiprocessor system, a plurality of processors are connected through a shared bus, an authority as a master is allocated to one of the processors, and an authority as a slave is allocated to the other remaining processors. What is called a master processor to which the master authority was allocated executes processes to shared sections of a memory, an input/output apparatus, and the like. What is called a slave processor to which the slave authority was allocated mainly executes a distributing process of a job. The allocation of the master processor and slave processors to a plurality of processors is fixedly determined.
In such a multiprocessor system, it is necessary to have a mechanism such that when an abnormality occurs in a processor, a degeneration to disconnect the processor in which an abnormality occurs from the system is executed and the system can operate even with a minimum construction. In the conventional multiprocessor system, therefore, at the time of an initializing process of the system activation, the master processor monitors a plurality of slave processors and a slave processor in which an abnormality occurs is disconnected from the system and is degenerated, thereby enabling the system to operate even with the minimum construction of one master processor and one slave processor. However, there is a problem such that since the master processor is fixedly determined by the connecting position or the like, when the master processor is abnormal, the degeneration operation cannot be executed, so that even if a plurality of processors can effectively operate, the system hangs up.